The present invention relates to programmable anti-fuse structures as well as methods of fabricating the same. More particularly, the present invention relates to voltage programmable anti-fuse structures including at least one conductive material island atop a dielectric surface that is located between two adjacent conductive features as well as methods of fabricating and programming the same. The present invention also relates to a design structure including such voltage programmable anti-fuse structures.
The manufacture of integrated circuits (ICs) typically includes the formation of metallization layers which are patterned to provide interconnection between devices. Some IC interconnections are programmable, either with fuses or anti-fuses. Non-programmed fuses provide a low resistance link between or within metallization layers which can be programmed by being blown. That is, the fuse can be caused to be non-conductive by applying a sufficiently high current across it to blow.
Anti-fuses operate in the opposite fashion, i.e., the non-programmed structure used to form the anti-fuse has an intrinsically high resistance, and the programmed structure has a relatively low resistance. By applying a programmable current, the electrical resistance through the anti-fuse material is greatly reduced providing a conductive link between or within metallization levels. Programming of typical anti-fuse structures can be accomplished by providing a voltage of 4-10 volts between the metal layers. Before programming, the anti-fuse structure typically has a resistance of above 1 giga-ohm for a 1 μm diameter via. A programmed anti-fuse forms a conductive path between the metal layers having a resistance of about 20-100 ohms.
Anti-fuse structures allow for much higher programmable interconnection densities than standard fuse structures as well as smaller current and power for the non-programmed elements. Anti-fuse structures have been used in the semiconductor industry for memory related applications, such as, for example, field programmable gate arrays and programmable read-only memories. As indicated above, anti-fuse structures include a material which initially has a high resistance but can be converted into a lower resistance by performing a certain application. For example, an unprogrammed anti-fuse type gate array can be programmed by causing a selected anti-fuse type to become conductive.
Prior art processing for integrating voltage programmable anti-fuse structures into existing semiconductor structures however require many extra masking and etching steps which increase overall fabrication costs. Moreover, prior art voltage programmable anti-fuse structures exhibit poor reliability. That is, since the programming voltage for creating the electrical path is a function of the thickness of the anti-fuse material layer, the anti-fuse material damage resulting from dielectric over-etching can cause deprogrammed states and result in product failure. Also, the design of prior art voltage programmable anti-fuse structures is limited since the voltage programming methods requires a sandwich structure with a layer of anti-fuse material in between two ‘disconnected’ conductive materials. This required design limitation of prior art voltage programmed anti-fuse structures limits the design flexibility and enlarges the area required for forming the anti-fuse element.